Open Loop V/f Example

Describes the open loop v/f control implementation for the PEController. More...

Modules
	Structures
	Functions
	Configurations

Detailed Description

This example controls one/multiple three phase inverter modules using the PWM signals of the PEController. The three phase signal starts from the INITIAL_FREQ and gradually increases dependent upon the value of ACCELERATION to reach the OUTPUT_FREQ. A constant V/f is maintained through out this process using the ratio NOMINAL_FREQ / NOMINAL_MODULATION_INDEX. These configurations are available in the file "open_loop_vf_config.h"

The example can be used for the following configurations of PELab. Select your desired configuration from file "user_config.h"

PELab Configuration	PWM Signals Inverter 1	PWM Signals Inverter 2
PLB-6PH	Leg 1: Q1, Q2 Leg 2: Q3, Q4 Leg 3: Q5, Q6	Leg 1: Q7, Q8 Leg 2: Q9, Q10 Leg 3: Q11, Q12
PLB-3PH	Leg 1: Q1, Q2 Leg 2: Q3, Q4 Leg 3: Q5, Q6	-
PLB-MMC	Leg 1: Q1, Q2 Leg 2: Q3, Q4 Leg 3: Q5, Q6 Leg 4: Q7, Q8*	Leg 1: Q9, Q10 Leg 2: Q11, Q12 Leg 3: Q13, Q14 Leg 4: Q15, Q16*
PLB-TNPC	Leg 1: Q1, Q2, Q3, Q4 Leg 2: Q5, Q6, Q7, Q8 Leg 3: Q9, Q10, Q11, Q12 Leg 4: Q13, Q14, Q15, Q16*	-

*Leg 4 is a duplicate leg of leg 3 and is used in only some configurations to fully test all included power modules

Initializes the algorithm using OpenLoopVfControl_Init(). Once initialized constantly polls using OpenLoopVfControl_Loop().