Processor to Processor Communication

Controls the communication between the communication and controls processors. More...

Modules
	Type Definitions
	Structures
	Variables
	Functions
	Macros

Detailed Description

The BSP has the following structure -The CM4 core is responsible for the external communication such as Fiber, SPI, Ethernet, USB. -The CM7 core is responsible for ADC acquistion and control implementation. The CM4-CM7 communication provided is divided into two portions

1. Data Buffers: These are defined in p2p_data_buffs_t and are shared between both cores. Both cores can access these shared registers because they are in a shared accessible space. Users can store parameters meant to be shared between both cores, such as current power or current, in these data buffers
2. Messaging from CM4 to CM7: This is controlled using p2p_msg_t. These messages are used to update settings and parameter values in the CM7 core. These values cannot be directly updated in the registers because they are critical for the control system and cannot be changed without a specific control sequence from the CM7 core.